[Solved] PCIe enumeration

svilen
svilen New Member Posts: 7

We have a prototype seires of 10 pieces, based on UP Core Plus board. On our custom board, to PCIe bus 0 and bus 2 are connected LAN7430 and LAN7431 Ethernet adapters. In 3 of the prototypes we found that the PCIe bus 0 device is not always enumerated at first run, but always found after soft reboot. I guess some timing parameters are not meet, but don't know what is defined in UP Core Plus BIOS. Is it possible to know what timing must be meet? Is it any configurable parameter than can add a delay or tweak the enumeration process? We try to re-scan the bus from Linux, but seems that when nothing is found by BIOS the bus is disabled or reported that not support re-scan (hot plug) and haven't success.

Comments

  • rogertsai(AAEON)
    rogertsai(AAEON) New Member Posts: 350 ✭✭✭

    @svilen
    As per your feedback, It seems like a timing issue. You should check your custom board design with below 2 points
    1. Do you connect your "PCIe Reset pin" of LAN7430/LAN7431 to our "BUF_PLT_RST#"? All reset pins should be connected to our platform reset pin
    2. Check your CLKREQ# signal to our "PCIE_CLKREQ0#" & "PCIE_CLKREQ2#"
    BTW, you can find the carrier-board design guide here.
    https://downloads.up-community.org/download/up-core-plus-carrier-board-design-guide/

  • svilen
    svilen New Member Posts: 7

    Hi.
    The BUF_PLT_RST, PCIE_CLKREQx and PCIE_WAKEx are interconnected.
    Our board voltage regulators are powered from the 5V output on header. Maybe it is not available imeddeately?

  • rogertsai(AAEON)
    rogertsai(AAEON) New Member Posts: 350 ✭✭✭
    edited March 2020

    @svilen

    Our board voltage regulators are powered from the 5V output on header. Maybe it is not available imeddeately?

    The 5V output on DOCKING's (I & II) connector is powered directly from the PMIC.
    So, in logic, that has nothing to do with the 5V output

  • svilen
    svilen New Member Posts: 7

    Is it possble to be done a rescan and enumeration from Linux? Currently we haven't success from /sys/bus/pci/rescan function. Is it completely disabled by BIOS or maybe is possible to be reported like a hot plug port and issue a rescan?

  • rogertsai(AAEON)
    rogertsai(AAEON) New Member Posts: 350 ✭✭✭

    @svilen ,
    Ok, please follow the steps below for enabling PCIe Hot plug in BIOS
    1. Press key to enter the BIOS Setup (password enter screen)
    2. Enter admin password : upassw0rd
    3. Go to CRB Setup --> CRB Chipset --> South Cluster Configuration --> PCI Express Configuration
    4. Enable Hot Plug on each PCI Express Root Port, as shown below for the PCIe port 1 ~ 6
    5. Press the key to save the configuration and reset.

  • svilen
    svilen New Member Posts: 7

    Thanks for your reply. That is exactly I was looking for.

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