Use more SPI CS from GPIO
fvllml
New Member Posts: 12 ✭
Hello, I want to have 8 CS from the Up squared board. I have done it for Raspberry Pi by following this link but cannot find a good tutorial for Up squared. I'm using ubuntu 20.04 with the RT patch.
Linux up 5.4.65-rt38+ #1 SMP PREEMPT_RT Mon Feb 28 13:42:31 CET 2022 x86_64 x86_64 x86_64 GNU/Linux
Have someone managed to program more CS on the Up squared? any idea how could I do that?
Thanks
Comments
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So I managed to create a new spidev device with ACPI overlays as follows:
/* * This ASL can be used to declare a spidev device on SPI0 CS2 */ DefinitionBlock ("", "SSDT", 5, "INTEL", "SPIDEV2", 1) { External (_SB_.PCI0.SPI1, DeviceObj) External (_SB_.PCI0.GIP0.GPO, DeviceObj) Scope (\_SB.PCI0.SPI1) { Name (_CRS, ResourceTemplate () { GpioIo (Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, "\\_SB.PCI0.GIP0.GPO", 0) { 22 // pin 22 is BCM25 or 402 in linux } }) Name (_DSD, Package() { ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "compatible", "spidev" }, // not sure if this is needed Package () { "cs-gpios", Package () { 0, 0, ^SPI1, 0, 0, 0, // index 0 in _CRS -> pin 22 } }, } }) Device (TP2) { Name (_HID, "SPT0001") Name (_DDN, "SPI test device connected to CS2") Name (_CRS, ResourceTemplate () { SpiSerialBus ( 2, // Chip select PolarityLow, // Chip select is active low FourWireMode, // Full duplex 8, // Bits per word is 8 (byte) ControllerInitiated, // Don't care 1000000, // 10 MHz ClockPolarityLow, // SPI mode 0 ClockPhaseFirst, // SPI mode 0 "\\_SB.PCI0.SPI1", // SPI host controller 0 // Must be 0 ) }) } } }
However, the CS on pin 22 is low all the time which shouldn't be the case. Perhaps I need to enable the GPIO somehow? is the number of the pin correct? I'm using pin numbering from here