OpenSource UEFI BIOS by Intel appears to be unusable now

Satoshi

I purchased UPS-APLX7-A20-0864 (Atom Intel E3950 model) last month and discovered that the open source firmware provided by Intel (*1, *2) no longer worked.

Can anyone comment on if this is the case and if there will be a fix?

To be more precise, the board fails to complete FSP initialization and freezes at a black screen. Attached are the logs from my board (ends at FspFindFspHeader) and the log from a friend of mine showing the successful flow, both with debug-build Intel BIOS. If I write back to the proprietary BIOS, it of course boots fine (a pic attached). This is was never seen with mine bought about 2 years ago and another friend's one bought just three months ago.

I purchased the board for the DCI debugging capability available with the Intel BIOS, so switching to another BIOS is not an option unless it came with DCI enabled. Suggestion on things to try to workaround the issue while enabling DCI is veery appreciated too.

Thanks for your help in advance,

*1: https://github.com/up-board/up-community/wiki/Firmware
*2: https://www.intel.com/content/www/us/en/download/674509/intel-atom-processor-e3900-series-apollo-lake-up-squared-board-flash-images-r-71.html

camillus

Hi @Satoshi ,

Here is a way to enable the DCI debug in BIOS, please check and let us know if that works.

1. Press Del to enter CRB BIOS settings with password “upassw0rd”
2. Main -> CRB Setup -> CRB Advanced -> Debug Settings -> set “Platform Debug Consent” to [Manual]
3. Main -> CRB Setup -> CRB Advanced -> Debug Settings -> Advanced Debug Settings -> set “DCI Enable” to [Enabled]

Best regards,

Satoshi

Hi @camillus

You are looking at a different BIOS. Neither UPA1AM52 (one flashed when shipped) nor UPA1AM61 (the latest available version *1) has those settings.

There is one under

• [CRB Setup] > [CRB Chipset] > [South Cluster Configuration] > [Miscellaneous Configuration] > [DCI enabled (HDCIEN)]

but this has not been working since v36. See the version history (*2). Enabling it does not set the bit in IA32_DEBUG_INTERFACE or let you connect with DCI.

If you can share the BIOS that you confirmed to work on the latest UP Squared board, please do so. I am happy to try.

*1: https://downloads.up-community.org/
*2: https://github.com/up-board/up-community/wiki/UP_Squared_BIOS_History

camillus

Hi @Satoshi,

We could not find the download link of Firmware Update Utilities on Intel website.

However, if you still want to use the OpenSource UEFI BIOS, the safe way is to flash the BIOS (.bin image) using an SF100 programmer, we tested both bin files and successfully boot to the BIOS. You can refer to the guide from Wiki.

To try DCI support on AAEON BIOS, you can find that item in R5.2 BIOS -> CRB Setup menu-> Chipset -> South Cluster Configuration -> Miscellaneous Configuration

-- DCI enable (HDCIEN)
-- DCI Auto Detect Enable

Satoshi

flash the BIOS (.bin image) using an SF100 programmer, we tested both bin files and successfully boot to the BIOS

This is what I did and the result is as in the first comment. Did you test on the very recently manufactured board? As I mentioned, if you are using one from few months ago, it works. It is possible that not all new boards have the same issue as mine.

I want you to compare your serial output with mine (ie, the attached failed.log) and advise possible resolutions for me based on differences. If the issue is one off and the other boards are not expected to have the same issue, I would be cool with exchanging the board, but I do not believe it is one off.

To try DCI support on AAEON BIOS, you can find that item in R5.2 BIOS

I already commented that this no longer works since v36.

I would have purchased this board 20 more units and more for future opportunities if DCI had worked. I offer training course and this board would have been ideal for it.

camillus

Hi @Satoshi,

Can you please confirm which Dediprog SW you used for the SF-100 ? on our side we updated to latest version 7.3.67.33 https://www.dediprog.com/download/save/1229.msi . Please also check the pinout of the connector between SF100 and UPS-APL, and the Flash chip is W25Q128JW

I have verified that DCI was disabled from our UP Squared BIOS because it showed a lot of instability. To leverage DCI on our platforms we recommend newer platforms like UP Xtreme or UP Xtreme i11 and the upcoming UP Squared 6000.

Satoshi

7.3.67.33 is the version I use too. The fact that I have been able to write back UPA1AM* BIOS means flashing blob has not been the problem.

Are you able to confirm that the Intel BIOS is no longer functional as advertised in this page then?
https://github.com/up-board/up-community/wiki/Firmware

Also, please let me know which SKU is (are) DCI-enabled from the UP Squared 6000 series? There are multiple models on the shop:

• UPN-EHLCN2-A10-0232 (Celeron® N6210)
• UPN-EHLPJ4-A10-0432 (Pentium® J6426)
• UPN-EHLX4E-A10-0432 (Atom® x6413E)
• UPN-EHLX4RE-A10-0864 (Atom® x6425RE)

As long as you can confirm it, I would not mind pre-ordering one.

I already have UP Xtreme i11 which functional DCI, but it is an costly board. A cheap and easily available DCI compatible board is the essential resource for learners and attracts more users.

r0h

@camillus is it possible to post a link to the old v3.3 firmware? That would allow people who want to test DCI to do so at their own discretion on cheaper UP Squared boards

Satoshi

Updating this thread with my latest findings:

• You could enable DCI by patching the AMI BIOS and flashing it (details below)
• A friend of mine told me UP Squared Pro Atom Quad Core 0464 was compatible with the Intel BIOS and debugging through Intel System Debugger.

For the former
1. Get the AAEON retail BIOS. I used v61 simply as the latest version at the time.
2. With UEFITool, search for the hex pattern "b9 80 0c 00 00" which is the instruction to move 0xc80 (the MSR #) to ECX. There will be 2 hits, both in the SiInit PEI module.
3. Extract that module and disassemble the code around those bytes. It is setting IA32_DEBUG_INTERFACE MSR to 0x40000000 (setting lock bit).
4. Change 0x40000000 at the higher address to 0x40000001. (2nd one in this picture)

5. Write it back to the BIOS image with UEFITool v2.8
6. Enable DCI through the BIOS menu, ie, [CRB Setup] > [CRB Chipset] > [South Cluster Configuration] > [Miscellaneous Configuration] > [DCI enabled (HDCIEN)]
7. Boot the system. IA32_DEBUG_INTERFACE should be 0x40000001 (DCI_EN bit is set)

deimos

Hi Satoshi, it's unfortunate an Aeeon bios engineer was not able to view this, as I feel they would/should have been able to figure out the problem. It turns out that newer boards use a different memory module and the FSP-M UPD configuration needs to reflect those differences.

See https://up-board.org/pcn-up-squared-dram-emmc-bios/ for the Product Change Notice.
See https://github.com/henshaw777/UP2_FW for a repo that contains a fix.

Hope this helps!