How to make SPI communication in realtime?

mosharp New Member Posts: 1

I have used UP Board, with 4.15 low-latency linux kernel from
When i run spi application will get 10ms latency, meanwhile normal cost time is 0.8ms.

We found spi in the kernel is stuck by irq, but we have no idea about that.



  • DCleri
    DCleri Administrator, AAEON Posts: 1,213 admin

    Hi @mosharp

    Are you running Ubuntu 18.04 with our 4.15 low-latency kernel?

    Can you share the spi application you are running and some logs about the delays introduced by IRQ?

  • Bleuten
    Bleuten New Member Posts: 3


    I'm reviving this thread as I experience a similar issue. Couple of months ago, I wrote a low latency user-space SPI driver for a physical Ethernet chip on a raspberry pi (using a memory mapping of the SPI registers): this worked well and I decided to port it to a UP board in order to get improved computing capabilities on top of it. Although the datasheets of the intel CPU and MAX V CPLD are available, nobody seems to know how they are interfaced on the UP board and in particular how to program the MAX V. Would it be for example possible to implement a set of bit-banged SPI masters on the MAX V and get the corresponding outputs on the 40-pin header? What would then be the available communication channels between the CPU and the MAX V ?

  • DCleri
    DCleri Administrator, AAEON Posts: 1,213 admin

    the FPGA can be reprogrammed only for custom projects.

    With the current configuration the FPGA acts only as pinctrl and voltage level shifter to 3.3V.
    You communicate directly with the SPI interface of the SoC and the implementation of the pinctrl driver is publicly available:
    Ubuntu Kernel for UP Source Code:
    Kernel patches for Yocto kernel 4.19:

    Please consider that UP Board use a so called "legacy driver" while the UP Squared and newer boards implement an updated version where SPI can be accessed via userspace using (or modifying) our ACPI override configurations (example SPI UP Squared):

  • Bleuten
    Bleuten New Member Posts: 3

    Thanks for the quick and detailed answer