UART1 pin configuration

allsey87

Regarding UART1 on the 100-pin header on the Up Core (i.e., pins 12, 14, 16, and 18), does anything need to be set in the BIOS to configure these pins to function as a UART?

Looking at the two commercial carrier boards available for the Up Core, it seems that these pins are not used on CRST01 and are connected to an FPGA on CRST02...

rogertsai(AAEON)

@allsey87
Please make sure you have enabled HSUART #1 in BIOS > Chipset > South Bridge > LPSS HSUART #1 support
And the general purpose bus (UART, I2C, SPI, GPIO) are available for use with UPC-CRST02, the FPGA is used to convert the GP signal from 1.8v to 3.3v level. You can find the UART1 pinout in 30pin header, see more details at https://up-shop.org/up-core-carrier-boards.html

Block diagram, https://up-shop.org/media/productattach/u/p/up-crst02_block_diagram.jpg
Design guide, https://up-shop.org/media/productattach/u/p/up_core_carrier_board_design_guide_20171116_2_.zip

BIOS, HSUART #1

UPC-CRST02, 30pin header for HAT40

allsey87

@rogertsai(AAEON) thanks for the detailed answer! A couple of follow up questions regarding enabling the LPSS HSUART #1 support in the BIOS:
1. Should this be enabled in PCI mode or in ACPI mode?
2. What is the difference between these two modes?
3. Does ACPI mode require an entry in the SSDT, and if so, does it have to be on the EEPROM chip?

DCleri

1. ACPI
2. it is the way the OS can detect and manage the peripherals. Linux kernel drivers support ACPI
3. ACPI information are already set in the BIOS as the UART comes from the SoC

allsey87

Thanks for the clarifications @DCleri

allsey87

Hi @DCleri and @rogertsai(AAEON), one last follow up question, referring to pages 54 and 62 of the Intel Atom Z8000 Processor Series Datasheet Volume 1 (attached for convenience), I can see the pins for UART1 are multiplexed with UART0. Where are the settings that control whether, for example, UART1_DATAIN is made available on pin AD14 or on BT26?

allsey87

I guess that it is the setting of LPSS HSUART #1 support to ACPI in the BIOS that sets up the correct pin directions for UART1 at boot, but does this include the hardware flow control pins RTS and CTS?

rogertsai(AAEON)

@allsey87 said:
Hi @DCleri and @rogertsai(AAEON), one last follow up question, referring to pages 54 and 62 of the Intel Atom Z8000 Processor Series Datasheet Volume 1 (attached for convenience), I can see the pins for UART1 are multiplexed with UART0. Where are the settings that control whether, for example, UART1_DATAIN is made available on pin AD14 or on BT26?

The Z8350 Processor is T3 SoC, so the UART1_DATAIN (AD14) is Pin18 - UART1 RXD (cn40)