DOCKING II (CN26) header

jaymanjayman New Member Posts: 34

Had a couple questions about the signals on the DOCKING II (CN26) header:

  1. Am I correct to assume that SLP_S3# (pin 1) connects to SUS_STAT# on the chipset?
  2. Do pins 19/21 connect directly to the I2C4 port on the chipset?
  3. Do pins 18/20 connect directly to the SMBus controller on the chipset?
  4. What is the origin of the STACK_GPIO[1:7] signals? Do they connect to the chipset or the SIO chip? If chipset, what is the mapping for those pins?

As far as the actual 30-pin connector, do you offer a cable that mates with that connector in order to access these signals? Or do we need to build our own? What's the part number for the mating connector?

Actually I had the same question about the USB connector (CN16). Do you offer some kind of cable or adapter that fits that socket? If not, what's the part number of the mating connector?

Comments

  • jaymanjayman New Member Posts: 34
    edited July 18

    @jayman said:
    1. Am I correct to assume that SLP_S3# (pin 1) connects to SUS_STAT# on the chipset?

    Disregard that one. SLP_S3# belongs to the PMC, not the LPC, sorry.

  • jaymanjayman New Member Posts: 34

    Any thoughts or info on this?

    @jayman said:
    Had a couple questions about the signals on the DOCKING II (CN26) header:

    1. Do pins 19/21 connect directly to the I2C4 port on the chipset?
    2. Do pins 18/20 connect directly to the SMBus controller on the chipset?
    3. What is the origin of the STACK_GPIO[1:7] signals? Do they connect to the chipset or the SIO chip? If chipset, what is the mapping for those pins?

    As far as the actual 30-pin connector, do you offer a cable that mates with that connector in order to access these signals? Or do we need to build our own? What's the part number for the mating connector?

    Actually I had the same question about the USB connector (CN16). Do you offer some kind of cable or adapter that fits that socket? If not, what's the part number of the mating connector?

  • jaymanjayman New Member Posts: 34

    Still curious about the STACK_GPIO[1:7] signals on CN26. Can you clarify what they connect to on the chipset?

  • DCleriDCleri Administrator, AAEON Posts: 1,085 admin
    edited October 16

    they are connected directly to the SoC GPIOs like all the other signals and at 1.8V level (except the power signals)

    The only connector that we make available is the one to connect CN26 with the carrier board (e.g. Net Plus) as those extra signals are needed for the correct functionality of the 2 boards together

  • jaymanjayman New Member Posts: 34
    edited October 16

    Thanks @DCleri! Can you provide the mapping of the STACK_GPIO[7:1] pins to PCH GPIO pins please?

    The WHL EDS doesn't make any mention of "STACK_GPIO" so it's not clear to me what those pins are actually connected to. Does that refer to ISH_GP[7:1} or something else?

Sign In or Register to comment.