DOCKING II (CN26) header
Had a couple questions about the signals on the DOCKING II (CN26) header:
- Am I correct to assume that SLP_S3# (pin 1) connects to SUS_STAT# on the chipset?
- Do pins 19/21 connect directly to the I2C4 port on the chipset?
- Do pins 18/20 connect directly to the SMBus controller on the chipset?
- What is the origin of the STACK_GPIO[1:7] signals? Do they connect to the chipset or the SIO chip? If chipset, what is the mapping for those pins?
As far as the actual 30-pin connector, do you offer a cable that mates with that connector in order to access these signals? Or do we need to build our own? What's the part number for the mating connector?
Actually I had the same question about the USB connector (CN16). Do you offer some kind of cable or adapter that fits that socket? If not, what's the part number of the mating connector?
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