USB 3.0 interface bandwidth and capability
We are considering selecting the UP Extreme for our upcoming application which involves image acquisition from multiple (3 or 4) USB 3.0 Cameras. The resolution (1.4 Megapixels) and frame rate (over 100 fps) of the cameras we use cannot be handled with one USB chip servicing all ports. So, with our current PC-based solution, we use a 4-port USB PCI-Express card that offers a dedicated USB chip for each USB interface/connector. Obviously, the UP Extreme does not have a PCI-Express expansion bus for us to use the same 4-port card.
I need some information on the USB 3.0 implementation on the UP Extreme. In pariticlay, I would like to know if it uses one (1) chip and the 5 GBPS bandwidth is shared across all USB interfaces, or does it use multiple chips. Please provide this details.
If the board uses one (1) chip, is there any "Add-on" solution that we could obtain and add to the board to achieve the required bandwidth?
Thanks,
Mo
Comments
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@MoA You may check the block diagram. . We use PCIE signal directly from Whiskeylake SoC. We didn't use super I/O chip for USB3.0 ports. Each USB3.0 is coming from an individual PCIe line.
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As Aling stated, the USB 3 ports are connected directly to the Whiskey Lake PCH. They actually support USB 3.1 SuperSpeed+, i.e. 10 Gb/s. Each USB 3 port is backed by its own dedicated PCIe lane, so that bandwidth is not shared across the 4 USB 3 ports.
From the Whiskey Lake PCH design spec:
The PCH contains an eXtensible Host Controller Interface (xHCI) which supports up to 10 USB 2.0 ports and up to 6 USB 3.1 ports with board routing, ACPI table and BIOS considerations are required. This controller allows data transfers of up to 10 Gb/s for USB 3.1 Gen 2 ports and 5 Gb/s for USB 3.1 Gen 1 ports. The controller supports SuperSpeedPlus (SS+), SuperSpeed (SS), High-Speed (HS), Full-Speed (FS) and Low- Speed (LS) traffic on the bus.
