Driver Access to GPIO on Windows 11 IoT Enterprise
I'm using the UP Squared Pro 7000 as a prototyping platform for a commercial product. This entails some custom drivers, one of which will be a KMDF or UMDF2 driver that will access GPIO. Some ACPI will be in place to load the device driver and declare the GPIO resources used.
I've looked at the sample code for GPIO, but it seems geared toward application access and requires the installation of the UP framework, which our product will lack: instead, the GPIO in question will be directly connected to an on-board component of interest.
So far, attempts to declare a connection to GPIO3 in ACPI as something like GpioIO(Shared, PullDown, , , , "\\_SB.GPI0", , , ,) { 3 } have yielded a successful result returned in the driver for an IOCTL_GPIO_WRITE_PINS operation, but GPIO3 on the 40-pin HAT connector does not change state. GPIO3 has, of course, been configured as an output in the UP board's BIOS menu with the ADC switched off.
While detailed schematics for the UP board aren't available, the block diagram on its datasheet shows signals to the HAT route through a Lattice FPGA (LCMXO2-640HC-6MG132C). I can only guess that the driver is perhaps setting the line successfully, but the signal is not making it through the FPGA.
My questions are:
1. Is the UP framework necessary for programming the UP board's Lattice FPGA to pass through selected GPIO?
2. Is there some way I can initialize the Lattice FPGA to allow low-level GPIO control to pass through?
3. Do I have the declaration for GPIO3 correct in my ACPI?
Answers
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@HexDump
1. UP Framework is used for control FPGA,remapped the GPIO number and handle switch multi function pins.
2. you can setting GPIOs in BIOS setup menu, BIOS will initial FPGA & GPIO in post stage.
3. GPIO3 is remapped GPIO number,ACPI declare you have to use SOC offset,
you can dump ACPI table and check AANT0F01 or AANT0F04 table to see all 28 pins offset.
and you have to set right direction in BIOS setup menu to help you initial FPGA right.
