Some UP 7000 PCI BAR registers appear to be cleared after booting into the OS?
Good Evening All,
I am currently a contributor on the redox operating system project. I am primarily working on drivers for the system, and I bought the UP7000 as a convenient development board for deploying and testing changes.
I am trying to write a driver for my UP7000's LPSS UARTs to interface with my development machine while testing devices, but I'm noticing some extremely strange behavior with it's PCI configuration.
It's my understanding that the BIOS is supposed to assign values to all of the BAR registers, and then the operating system simply enumerates them and then maps the specified regions into virtual memory.
The LPSS UART has a vendor ID of 0x8086, and the two UARTS have device IDs of 0x54A8 and 0x54A9. It's Bus 0, device 30, functions 0 and 1.
When viewing the device from the UEFI shell, I can clearly see that the BAR is set:
But when the PCIe driver on the operating system reads from the BAR at offset 0x10, it returns all 0s.
What's going on here? Is the firmware clearing the memory location before passing control over to the OS? I haven't ruled out a bug in redox's PCIe driver yet, but the same code works fine on other boards, so i'm wondering if this is a firmware quirk.
Any information that you can give me will be much appreciated!
Comments
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This behavior seems to be present on Linux as well. The BAR gets zeroized by the firmware, and then filled by the operating system. Why would it do this?