Is this true because of some kind of hardware limitation with the way the header is brought out from the FPGA? The data sheet on the Altera MAX10 states an weak internal pull up is available on all I/O pins.
I have multiple custom hardware shields that do not work because of the inability to set the internal pull up, like the Raspberry Pi hardware. I was contemplating trying to make extension cable with some pull up resistors for the sole purpose of trying one of the shields. Is there any progress on the ability to load a custom FPGA image where the weak pull up could be enabled?