motodork56 ✭

I'm designing an FPGA based "hat" for the original UP Board. My board will require about 2 amps (worst case). I would like to power my "hat" and the UP Board through the +5V pins on the GPIO. Since the UP board can require up to 4 amps plus the 2 amps from my "hat", six amps must be delivered through the two +5V GPIO pins on the GPIO connector. Can six amps of current be delivered on these pins? Often I see specifications that the typical connector pin is limited to one amp of current per pin. The very "best" connectors can carry 3 amps of current per pin. Power for the Up Board and my hat can be supplied from an external +5V, 8 amp power supply through the barrel jack. . The UP Board requires 4 amps, so are 4 amps actually available at the GPIO connector when powered from an 8 amp supply? A block diagram of power distribution on the UP board would be helpful.

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